Article
Article
- Engineering & Materials
- Physical electronics
- Nonvolatile memory devices
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Nonvolatile memory devices
Article By:
Fazio, Albert Memory Technology Development Section, Technology and Manufacturing Group, Intel Corporation, Santa Clara, California.
Last reviewed:2009
DOI:https://doi.org/10.1036/1097-8542.YB090139
- Flash cell basic operation
- Capacitor network scaling challenges
- Potential scaling solutions
- Additional Reading
Nonvolatile memories are semiconductor devices that retain their memory state when power is removed. These memories were first proposed in 1967 in the form of metal-nitride-oxide-semiconductor (MNOS) and floating gate concepts, with the floating gate structure ultimately becoming the most prevalent. First commercialized as the EPROM, Erasable Programmable Read Only Memory, almost 40 years ago, nonvolatile memory has evolved today to the form of flash memory as the fastest-growing memory segment, driven by the rapid growth of portable devices such as digital cameras, cellular phones, and music players. Flash memory allows for a subarray within the chip to be erased at one time, typically of 256 Kbytes. The most prevalent version of flash, NAND flash, is orientated toward data-block storage applications. [The term NAND actually refers to a logic gate “NAND” (Not AND), since the memory cells within NAND flash are configured similar to the transistors of a NAND logic gate.] The other main version of flash is called NOR, oriented toward embedded code execution. The nonvolatile NAND flash memory stores code and user files (music files, photos, videos, and so forth) in these products. This growth has been fueled by ever lower cost per memory bit achieved by the reduction of the memory cell area to smaller dimensions, a process called scaling. By the end of 2008, NAND flash manufacturing was expected to cross below the 50-nanometer node (where 50 nm is the width and length dimensions of the memory cell, along with the spaces between adjacent cells), and memory capacities were expected to reach 32 Gbit per chip. Scaling allows for more memory bits to occupy the same area from generation to generation and thus higher-capacity memories and lower cost per bit are attained. Availability of lower cost and higher-capacity memory, in turn, drives more application growth, with flash solid-state drives now poised to compete in computer applications against traditional magnetic hard disk drives.
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